MC10E167FN |
RFQ for MC10E167FN |
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| Product | Manufacturers | Pack | D/C |
| MC10E167FN | - | PLCC | - |
The MC10E/100E167 contains six 2:1 multiplexers followed by Dflip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW.
Features |
| `1000MHz Min. Operating Frequency`800ps Max. Clock to Output`Single-Ended Outputs`Asynchronous Master Resets`Dual Clocks`Extended 100E VEE Range of 4.2V to 5.46V`75kInput Pulldown Resistors |